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Home > products > Flash Memory IC Chip > P82B96DR Programmable Logic ICS Image Sensors 3D time-of-flight (ToF) sensor and controller 56-COG 0 to 70

P82B96DR Programmable Logic ICS Image Sensors 3D time-of-flight (ToF) sensor and controller 56-COG 0 to 70

manufacturer:
Manufacturer
Description:
Buffer, ReDriver 2 Channel 400kHz 8-SOIC
Category:
Flash Memory IC Chip
Price:
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Payment Method:
Paypal, Western Union, TT
Specifications
Mounting Style:
SMD/SMT
Maximum Operating Temperature:
+ 85 C
Minimum Operating Temperature:
- 40 C
Supply Voltage - Min:
- 0.3 V
Supply Voltage - Max:
18 V
Packaging:
Reel
Highlight:

programmable logic array ic

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programmable computer chip

Introduction

P82B96DR Programmable Logic ICS Image Sensors 3D time-of-flight (ToF) sensor and controller 56-COG 0 to 70

 

1 Features

  • Operating Power-Supply Voltage Range of 2 V to 15 V
  • Can Interface Between I2C Buses Operating at Different Logic Levels (2 V to 15 V)

  • Longer Cables by allowing bus capacitance of 400 pF on Main Side (Sx/Sy) and 4000 pF on Transmission Side (Tx/Ty)

  • Outputs on the Transmission Side (Tx/Ty) Have High Current Sink Capability for Driving Low- Impedance or High-Capacitive Buses

  • Interface With Optoelectrical Isolators and Similar Devices That Need Unidirectional Input and Output Signal Paths by Splitting I2C Bus Signals Into Pairs of Forward (Tx/Ty) and Reverse (Rx/Ry) Signals

  • 400-kHz Fast I2C Bus Operation Over at Least 20 Meters of Wire

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

  • ESD Protection Exceeds JESD 22

     

2 Applications

  • HDMI DDC

  • Long I2C Communication

  • Galvanic I2C Isolation

  • Industrial Communications

     

3 Description

The P82B96 device is a bus buffer that supports bidirectional data transfer between an I2C bus and a range of other bus configurations with different voltage and current levels.

One of the advantages of the P82B96 is that it supports longer cables/traces and allows for more devices per I2C bus because it can isolate bus capacitance such that the total loading (devices and trace leCM GROUPhs) of the new bus or remote I2C nodes are not apparent to other I2C buses (or nodes). The restrictions on the number of I2C devices in a system due to capacitance, or the physical separation between them, are greatly improved.

The device is able to provide galvanic isolation (optocoupling) or use balanced transmission lines (twisted pairs), because separate directional Tx and Rx signals are provided. The Tx and Rx signals may be connected directly (without causing bus latching), to provide an bidirectional signal line with I2C properties (open-drain driver). Likewise, the Ty and Ry signals may also be connected together to provide an bidirectional signal line with I2C properties (open- drain driver). This allows for a simple communication design, saving design time and costs.

Device Information

PART NUMBER

PACKAGE

BODY SIZE (NOM)

P82B96

SOIC (8)

4.90 mm × 3.91 mm

VSSOP (8)

3.00 mm × 3.00 mm

PDIP (8)

9.81 mm × 6.35 mm

TSSOP (8)

3.00 mm × 4.40 mm

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